Xilinx DS610 Bedienungsanleitung Seite 2
- Seite / 98
- Inhaltsverzeichnis
- LESEZEICHEN
- Spartan-3A DSP FPGA Family: 1
- Data Sheet 1
- Architectural Overview 4
- Configuration 4
- I/O Capabilities 4
- Figure 1: 5
- Table 2: 5
- Package Marking 6
- Ordering Information 6
- Functional Description 10
- Power Supply Specifications 12
- Table 8: 13
- Table 9: 14
- Single-Ended I/O Standards 15
- Table 11: 16
- (Continued) 16
- Differential I/O Standards 17
- Figure 4: 18
- Table 13: 18
- Bank 0 and 2 Any Bank 19
- Switching Characteristics 20
- Table 16: 21
- I/O Timing 22
- Table 18: 23
- Table 19: 24
- Table 20: 25
- Table 21: 26
- Table 22: 27
- Table 23: 27
- Table 24: 28
- Figure 8: 31
- Table 25: 31
- Table 26: 33
- Table 27: 34
- Table 28: 36
- Table 29: 37
- Table 30: 37
- Table 31: 37
- Block RAM Timing 38
- DSP48A Timing 39
- Table 34: 40
- Delay-Locked Loop (DLL) 41
- Table 36: 42
- Table 37: 43
- Table 38: 43
- ≥ 60 MHz 44
- DNA Port Timing 45
- Suspend Mode Timing 46
- Configuration and JTAG Timing 47
- Table 45: 48
- ConfigRate 48
- Table 46: 49
- Table 47: 49
- Table 48: 49
- Figure 11: 50
- Table 49: 50
- Slave Parallel Mode Timing 51
- Figure 13: 52
- Table 51: 52
- Figure 14: 54
- Table 53: 54
- Figure 15: 56
- Table 55: 56
- Revision History 57
- Product Specification 58
- Pinout Descriptions 59
- Package Pins by Type 60
- Table 59: 61
- Pinout Table 62
- Table 60: 63
- User I/Os by Bank 68
- CS484 Footprint 69
- Right Half of CS484 70
- Package (top view) 70
- XC3SD1800A FPGA 71
- Table 63: 72
- FG676 Footprint 81
- Right Half of FG676 82
- XC3SD3400A FPGA 83
- Table 65: 84
- Table 67: 95
- Migration Recommendations 96
- SPARTAN-3A DSP 97
Verwandte Produkte und Handbücher für Nein Xilinx DS610
(10 Seiten)© 2020, manymanuals.de. Alle Rechte vorbehalten. | 0.182 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Kommentare zu diesen Handbüchern