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Inhaltsverzeichnis

Seite 1 - PCI v3.0

RLogiCORE™PCI v3.0Getting Started GuideUG157 August 31, 2005v3.0.151

Seite 2

10 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Preface: About This GuideR

Seite 3

PCI v3.0.151 Getting Started Guide www.xilinx.com 11UG157 August 31, 2005RChapter 1Getting StartedThe PCI interface provides a fully verified, pre-imp

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12 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 1: Getting StartedRTechnical SupportFor technical support, visit www.

Seite 5 - Table of Contents

PCI v3.0.151 Getting Started Guide www.xilinx.com 13UG157 August 31, 2005RChapter 2Installing and Licensing the CoreThis chapter provides instructions

Seite 6 - Chapter 7: Timing Simulation

14 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 2: Installing and Licensing the CoreRCORE Generator IP Updates Instal

Seite 7 - About This Guide

PCI v3.0.151 Getting Started Guide www.xilinx.com 15UG157 August 31, 2005Installing the CoreRthe location of the Xilinx installation. Note that you ma

Seite 8 - Conventions

16 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 2: Installing and Licensing the CoreRLicensing OptionsEvaluation The

Seite 9 - Online Document

PCI v3.0.151 Getting Started Guide www.xilinx.com 17UG157 August 31, 2005Installing Your License FileRInstalling Your License FileAfter selecting a li

Seite 10 - Preface: About This Guide

18 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 2: Installing and Licensing the CoreR

Seite 11 - Getting Started

PCI v3.0.151 Getting Started Guide www.xilinx.com 19UG157 August 31, 2005RChapter 3Family Specific ConsiderationsThis chapter provides important desig

Seite 12 - Feedback

PCI v3.0.151 Getting Started Guide www.xilinx.comUG157 August 31, 2005Xilinx is disclosing this Specification to you solely for use in the development

Seite 13 - Chapter 2

20 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 3: Family Specific ConsiderationsR2S200-FG456-6C 33 MHz3.3V64-bitpcim

Seite 14 - UG157 August 31, 2005

PCI v3.0.151 Getting Started Guide www.xilinx.com 21UG157 August 31, 2005Design SupportRV300E-BG432-6C 66 MHz3.3V64-bitpcim_lc_66_3_d v300ebg432_64_66

Seite 15

22 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 3: Family Specific ConsiderationsR2VP20-FF1152-6C/I 66 MHz3.3V64-bitp

Seite 16 - Licensing Options

PCI v3.0.151 Getting Started Guide www.xilinx.com 23UG157 August 31, 2005Design SupportR4VSX35-FF668-10C/Iglobal clock33 MHz3.3V64-bitpcim_lc_33_3_g 4

Seite 17 - Installing Your License File

24 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 3: Family Specific ConsiderationsR2S50-PQ208-5C 33 MHz3.3V32-bitpcim_

Seite 18

PCI v3.0.151 Getting Started Guide www.xilinx.com 25UG157 August 31, 2005Design SupportR2S300E-PQ208-6C 33 MHz3.3V32-bitpcim_lc_33_3_s 2s300epq208_32_

Seite 19 - Chapter 3

26 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 3: Family Specific ConsiderationsR3S1200E-FG400-4C/I 33 MHz3.3V32-bit

Seite 20

PCI v3.0.151 Getting Started Guide www.xilinx.com 27UG157 August 31, 2005Design SupportRSee the product release notes included with the core for a com

Seite 21

28 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 3: Family Specific ConsiderationsRWrapper FilesWrapper files contain

Seite 22

PCI v3.0.151 Getting Started Guide www.xilinx.com 29UG157 August 31, 2005Device InitializationRDevice InitializationImmediately after FPGA configurati

Seite 23

www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 200506/24/02 3.0 Initial Xilinx release of corporate-wide common template set, used

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30 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 3: Family Specific ConsiderationsRAlthough this technique is not tech

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PCI v3.0.151 Getting Started Guide www.xilinx.com 31UG157 August 31, 2005Input Delay BuffersRIOBs of the FPGA device. The use of these delay buffers i

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32 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 3: Family Specific ConsiderationsR1. The jitter of the source clock,

Seite 27

PCI v3.0.151 Getting Started Guide www.xilinx.com 33UG157 August 31, 2005Regional Clock UsageRFor designs using regional clocking, the PCI interface a

Seite 28 - Guide Files

34 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 3: Family Specific ConsiderationsRBus Clock UsageThe bus clock output

Seite 29 - Bus Width Detection

PCI v3.0.151 Getting Started Guide www.xilinx.com 35UG157 August 31, 2005Electrical ComplianceRmaximum allowed frequency, and the frequency may change

Seite 30 - Input Delay Buffers

36 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 3: Family Specific ConsiderationsRFigure 3-3 shows the small range of

Seite 31

PCI v3.0.151 Getting Started Guide www.xilinx.com 37UG157 August 31, 2005Generating BitstreamsRFigure 3-4 shows one possible low-cost solution to gene

Seite 32 - Regional Clock Usage

38 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 3: Family Specific ConsiderationsRThis option is used to introduce ad

Seite 33

PCI v3.0.151 Getting Started Guide www.xilinx.com 39UG157 August 31, 2005RChapter 4Functional SimulationThis chapter describes how to simulate the pin

Seite 34 - Bus Clock Usage

PCI v3.0.151 Getting Started Guide www.xilinx.comUG157 August 31, 2005

Seite 35 - Electrical Compliance

40 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 4: Functional SimulationRMost of the files listed are related to the

Seite 36 - 3.3V PCI COMPLIANT

PCI v3.0.151 Getting Started Guide www.xilinx.com 41UG157 August 31, 2005Model Technology ModelSimR3. Modify the library search path by changing <X

Seite 37 - Generating Bitstreams

42 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 4: Functional SimulationR<Install Path>/vhdl/example/func_sim4.

Seite 38

PCI v3.0.151 Getting Started Guide www.xilinx.com 43UG157 August 31, 2005RChapter 5Synthesizing a DesignThis chapter describes how to synthesize the p

Seite 39 - Functional Simulation

44 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 5: Synthesizing a DesignR4. To add source files to the new project, c

Seite 40 - Model Technology ModelSim

PCI v3.0.151 Getting Started Guide www.xilinx.com 45UG157 August 31, 2005Synplicity SynplifyRThe next files are located in:<Install Path>/verilo

Seite 41

46 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 5: Synthesizing a DesignR8. After adding the three final files (for a

Seite 42

PCI v3.0.151 Getting Started Guide www.xilinx.com 47UG157 August 31, 2005Synplicity SynplifyR13. On the Device tab, set the Technology, Part, Speed, a

Seite 43 - Synthesizing a Design

48 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 5: Synthesizing a DesignRVHDL1. Start Synplify and choose File > N

Seite 44

PCI v3.0.151 Getting Started Guide www.xilinx.com 49UG157 August 31, 2005Synplicity SynplifyR5. Select the virtex.vhd file; then click Add to move thi

Seite 45

www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Preface: About This GuideGuide Contents . . . . . . . . . . . . . . . . . . . .

Seite 46

50 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 5: Synthesizing a DesignRThe final set of design files (the user appl

Seite 47

PCI v3.0.151 Getting Started Guide www.xilinx.com 51UG157 August 31, 2005Exemplar LeonardoSpectrumR12. From the main project window, click Change Targ

Seite 48

52 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 5: Synthesizing a DesignRThe end result of the synthesis step is an E

Seite 49

PCI v3.0.151 Getting Started Guide www.xilinx.com 53UG157 August 31, 2005RChapter 6Implementing a DesignThis chapter describes how to implement the pi

Seite 50

54 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 6: Implementing a DesignR•The par command, as provided in the script,

Seite 51 - Exemplar LeonardoSpectrum

PCI v3.0.151 Getting Started Guide www.xilinx.com 55UG157 August 31, 2005RChapter 7Timing SimulationThis chapter describes how to perform timing simul

Seite 52 - Xilinx XST

56 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 7: Timing SimulationRNC-Verilog processes the simulation files and ex

Seite 53 - Implementing a Design

PCI v3.0.151 Getting Started Guide www.xilinx.com 57UG157 August 31, 2005Model Technology ModelSimRcp ../xilinx/pcim_top_routed.sdf .2. View the ping.

Seite 54

58 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Chapter 7: Timing SimulationR

Seite 55 - Timing Simulation

PCI v3.0.151 Getting Started GuideUG157 August 31, 2005 www.xilinx.comChapter 5: Synthesizing a DesignSynplicity Synplify . . . . . . . . . . . . . .

Seite 56

PCI v3.0.151 Getting Started Guide www.xilinx.com 7UG157 August 31, 2005RPrefaceAbout This GuideThe PCI Getting Started Guide provides information abo

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8 www.xilinx.com PCI v3.0.151 Getting Started GuideUG157 August 31, 2005Preface: About This GuideRAdditional ResourcesFor additional information, go t

Seite 58 - Chapter 7: Timing Simulation

PCI v3.0.151 Getting Started Guide www.xilinx.com 9UG157 August 31, 2005ConventionsROnline DocumentThe following conventions are used in this document

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